Interrupting interlocked operations, Using interlocked operations – Texas Instruments TMS320C3x User Manual

Page 199

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Interlocked Operations

7-15

Program Flow Control

Note:

Timing Diagrams for SIGI

The timing diagrams for SIGI shown in the data sheets depict a zero wait
state condition. Since the device idles until one cycle after XF1 is signaled,
the data sheets show the XF1 signal sampled one H1/H3 cycle before setting
the XF0 signal low.

For the sequence of steps described here, the device idles past one H1/H3
cycle after the XF1 signal is detected.

7.4.1

Interrupting Interlocked Operations

While the LDFI, LDII, and SIGI instructions are waiting for XF1 to be set to 0,
you can interrupt them. LDFI and LDII require a ready signal (RDY

int

or

XRDY

int

) in order to be interrupted. Because interrupts are taken on bus-cycle

boundaries (see Section 7.6 on page 7-26), an interrupt may be taken any time
after a valid ready. If the interrupted LDFI or LDII consists of a multicycle load,
the load stops and an unknown value might be loaded into the register.

Interrupting an LDFI, LDII, or SIGI instruction allows you to implement
protection mechanisms against deadlock conditions by interrupting an
interlocked load that has taken too long. Upon return from the interrupt, the
next instruction is executed. The STFI and STII instructions are not
interruptible. Since the STFI and STII instructions complete when ready is
signaled, the delay until an interrupt can occur is the same as for any other
instruction.

7.4.2

Using Interlocked Operations

Note:

Incorrect Use of Interlock Instructions

Do not place an STFI or STII back-to-back with an LDFI, LDII, or SIGI instruction
as follows:

STFI

R1,*AR1

;

LDFI

*AR1, R2 ; Incorrect use of interlock instructions

See Section 7.4.3,

Pipeline Effects of Interlocked Instructions, on page 7-19.

Interlocked operations can be used to implement a busy-waiting loop, to manipu-
late a multiprocessor counter, to implement a simple semaphore mechanism, or
to perform synchronization between two ’C3x devices. The following examples
illustrate the usefulness of the interlocked operations instructions.

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