Texas Instruments TMS320C3x - Manual (Page 429)

DMA Controller
12-50
12.3.2 DMA Basic Operation
If a block of data is to be transferred from one region in memory to another region
in memory (as shown in Figure 12–34), the following sequence is performed:
DMA Registers Initialization
1) The source-address register of a DMA channel is loaded with the address
of the memory location to read from.
2) The destination-address register of the same DMA channel is loaded with
the address of the memory location to write to.
3) The transfer counter is loaded with the number of words to be transferred.
4) The DMA channel control register is loaded with the appropriate modes
to synchronize the DMA controller reads and writes with interrupts.
DMA Start
5) The DMA controller is started through the DMA START field in the DMA
channel control register.
Word Transfers
6) The DMA channel reads a word from the source-address register and
writes it to a temporary register within the DMA channel.
7) After a read by the DMA channel, the source-address register is increm-
ented, decremented, or unchanged depending on the INCSRC or
DECSRC bit fields of DMA channel control register.
8) After the read operation completes, the DMA channel writes the temporary
register value to the destination-address pointed to by the destination-
address register.
9) After the destination-address has been fetched, the transfer-counter reg-
ister is decremented and the destination-address register is incremented,
decremented, or unchanged, depending on the INCDST or DECDST bit
fields of the DMA channel control register.
10) During every data write, the transfer counter is decremented. The block
transfer terminates when the transfer counter reaches zero and the write
of the last transfer is completed. The DMA channel sets the transfer-counter
interrupt (TCINT) flag in the DMA channel control register.