Texas Instruments TMS320C3x - Manual (Page 350)

Bus Timing
10-47 TMS320C32 Enhanced External Memory Interface
Figure 10–34 through Figure 10–37 show the transitions between IOSTRB
writes/reads and STRBx writes/reads. In these transitions, the address
changes on the rising edge of the H3 cycle.
Figure 10–34. IOSTRB Write and STRBx Write
I/O write Write
STRBx
IOSTRB
RDY
D
A
R/W
H1
H3