Texas Instruments TMS320C3x - Manual (Page 716)

Instruction Opcodes
A-5 Instruction Opcodes
Table A–1. TMS320C3x Instruction Opcodes (Continued)
Instruction 23 24 25 26 27 28 29 30 31
RPTB 0 1 1 0 0 1 0 – –
SWI 0 1 1 0 0 1 1 – –
B cond(D) † 0 1 1 0 1 0 – – –
DBcond(D) † 0 1 1 0 1 1 – – –
CALL cond 0 1 1 1 0 0 – – –
TRAP cond 0 1 1 1 0 1 0 – –
RETI cond 0 1 1 1 1 0 0 0 0
RETS cond 0 1 1 1 1 0 0 0 1
MPYF3||ADDF3 1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
–
–
–
–
MPYF3||SUBF3 1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
–
–
–
–
MPYI3||ADDI3 1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
–
–
–
–
MPYI3||SUBI3 1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
–
–
–
–
STF||STF 1 1 0 0 0 0 0 – –
STI||STI 1 1 0 0 0 0 1 – –
LDF||LDF 1 1 0 0 0 1 0 – –
LDI||LDI 1 1 0 0 0 1 1 – –
ABSF||STF 1 1 0 0 1 0 0 – –
† The opcode is the same for standard and delayed instructions.