Texas Instruments TMS320C3x - Manual (Page 285)

External Memory Interface Timing
9-19 TMS320C30 and TMS320C31 External-Memory Interface
Figure 9–8 illustrates a read cycle with one wait state. Since (X)RDY = 1, the
read cycle is extended. (M)STRB, (X)R/W, and (X)A are also extended one
cycle. The next time (X)RDY is sampled, it is 0.
Figure 9–8. Use of Wait States for Read for (M)STRB = 0
H3
H1
(X)A
(X)D
XR/W
(M)STRB
(X)RDY
Write data
Extra
cycle
Read