Texas Instruments TMS320C3x User Manual

Page 180

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Bit-Reversed Addressing

6-27

Addressing Modes

Example 6–26. Bit-Reversed Addressing

*AR2++(IR0)B ;

AR2 =

0110 0000 (0th value)

*AR2++(IR0)B ;

AR2 =

0110 1000 (1st value)

*AR2++(IR0)B ;

AR2 =

0110 0100 (2nd value)

*AR2++(IR0)B ;

AR2 =

0110 1100 (3rd value)

*AR2++(IR0)B ;

AR2 =

0110 0010 (4th value)

*AR2++(IR0)B ;

AR2 =

0110 1010 (5th value)

*AR2++(IR0)B ;

AR2 =

0110 0110 (6th value)

*AR2

;

AR2 =

0110 1110 (7th value)

Table 6–3 shows the relationship of the index steps and the four LSBs of AR2.
You can find the four LSBs by reversing the bit pattern of the steps.

Table 6–3. Index Steps and Bit-Reversed Addressing

Step

Bit Pattern

Bit-Reversed

Pattern

Bit-Reversed

Step

0

0000

0000

0

1

0001

1000

8

2

0010

0100

4

3

0011

1100

12

4

0100

0010

2

5

0101

1010

10

6

0110

0110

6

7

0111

1110

14

8

1000

0001

1

9

1001

1001

9

10

1010

0101

5

11

1011

1101

13

12

1100

0011

3

13

1101

1011

11

14

1110

0111

7

15

1111

1111

15

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