Digi NS9750 - Manual (Page 10)

viii
Overview ................................................................................316
Ethernet MAC...........................................................................317
Station address logic (SAL) ....................................................321
Statistics module ...............................................................321
Ethernet front-end module ..........................................................323
Receive packet processor .....................................................324
Transmit packet processor ....................................................327
Ethernet Slave Interface.......................................................330
Interrupts ........................................................................331
Resets.............................................................................332
External CAM filtering ................................................................334
Ethernet Control and Status registers ..............................................337
Ethernet General Control Register #1 .......................................339
Ethernet General Control Register #2 .......................................342
Ethernet General Status register .............................................344
Ethernet Transmit Status register............................................344
Ethernet Receive Status register .............................................347
MAC Configuration Register #1 ...............................................348
MAC Configuration Register #2 ...............................................351
Back-to-Back Inter-Packet-Gap register.....................................354
Non Back-to-Back Inter-Packet-Gap register ...............................355
Collision Window/Retry register .............................................355
Maximum Frame register ......................................................357
PHY Support register ...........................................................358
MII Management Configuration register .....................................359
MII Management Command register..........................................360
MII Management Address register ............................................361
MII Management Write Data register ........................................362
MII Management Read Data register .........................................363
MII Management Indicators register..........................................363
Station Address registers ......................................................364
Station Address Filter register ................................................366
Register Hash Tables ...........................................................366
Statistics registers ..............................................................368
RX_A Buffer Descriptor Pointer register.....................................383
RX_B Buffer Descriptor Pointer register.....................................383
RX_C Buffer Descriptor Pointer register.....................................384