Digi NS9750 User Manual
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S e r i a l C o n t r o l M o d u l e : U A R T
Serial Channel B/A/C/D FIFO Data register
Address: 9020 0010 / 0050
9030 0010 / 0050
The Serial Channel B/A/C/D FIFO Data registers manually interface with the serial
controller FIFOs instead of using DMA support.
Writing to the transmit register loads the transmit FIFO. This register can be written
only when the TRDY field is set in Serial Channel Status Register A. Writing to the
Serial Channel FIFO Data register automatically clears the TRDY bit.
150
6143
3071
1535
300
3071
1535
767
600
1535
767
383
1200
767
383
191
2400
383
191
95
4800
191
95
47
7200
127
63
31
9600
95
47
23
14400
63
31
15
19200
47
23
11
28800
31
15
7
38400
23
11
5
57600
15
7
3
115200
7
3
1
230400
3
1
0
460800
1
0
N/A
921600
0
N/A
N/A
1843200
N/A
N/A
N/A
Baud rate
N field
x8 UART mode
x16 UART mode
x32 UART mode
Table 372: Bit-rate examples for X1_SYS_OSC/4