Digi NS9750 - Manual (Page 223)

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M e m o r y C o n t r o l l e r
Table 134 shows the outputs for the memory controller and the corresponding inputs
to the 256M SDRAM (32Mx8, pins 13 and 14 used as bank selects).
6 6 16 7
5 5 15 6
4 4 14 5
3 3 13 4
2 2 12 3
1 1 11 2
0 0 10 **
Output address
(
ADDROUT )
Memory device
connections AHB address to row
address AHB address to
column address
14 BA1 25 25
13 BA0 24 24
12 12 23 -
11 11 22 -
10 10/AP 21 AP
9 9 20 10
8 8 19 9
7 7 18 8
6 6 17 7
5 5 16 6
4 4 15 5
3 3 14 4
2 2 13 3
Table 134: Address mapping for 256M SDRAM (32Mx8, BRC)
Output address
(
ADDROUT )
Memory device
connections AHB address to row
address AHB address to
column address
Table 133: Address mapping for 256M SDRAM (16Mx16, BRC)