Digi NS9750 - Manual (Page 720)

B B u s s l a v e a n d D M A i n t e r f a c e
6 9 6 N S 9 7 5 0 H a r d w a r e R e f e r e n c e
D05 R/W PinSelectInterrupt 0x0 Pin select interrupt enable
0 Disable
1 Enable
D04 R/W ECPChannel
Address 0x0 Channel address update detect interrupt
enable
0 Disable
1 Enable
D03:02 N/A Reserved N/A N/A
D01 R/W NegotiationStart 0x0 Negotiation start interrupt enable
0 Disable
1 Enable
This interrupt is triggered when the rising edge of
SELECTIN is found while in compatibility mode.
D00 R/W TransferStart 0x0 Transfer start interrupt enable
0 Disable
1 Enable
This interrupt is triggered when the falling edge of
STROBE is found while in compatibility mode.
Bits Access Mnemonic Reset Description
Table 404: fei — Interrupt Enable register