Digi NS9750 - Manual (Page 593)

w w w . d i g i e m b e d d e d . c o m 5 6 9
L C D C o n t r o l l e r
Pixel serializer
The pixel serializer block reads the 32-bit wide LCD data from DMA FIFO output port,
and extracts 24, 16, 8, 4, 2, or 1 bpp, depending on the current mode of operation.
The LCD controller supports big endian, little endian, and WinCE data formats. In
dual panel mode, data is read alternately from the upper and lower DMA FIFOs. The
mode of operation determines whether the extracted data is used to point to a color/
grayscale value in the palette ram or is actually a true color value that can be applied
directly to an LCD panel input.
The next six figures show the data structure in each DMA FIFO word corresponding to
the Endianness and bpp combinations. For each of the three supported data formats,
the required data for each panel display pixel must be extracted from the data word.
Figure 87 and Figure 88 show the data structure for little endian byte, little endian
pixel — LBLP.
Figure 89 and Figure 90 show the data structure for big endian byte, big endian
pixel — BBBP.
Figure 91 and Figure 92 show the data structure for little endian byte, big endian
pixel — LBBP. (This is WinCE format.)