Dma control and status registers – Digi NS9750 User Manual
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D M A C o n t r o l a n d S t a t u s r e g i s t e r s
5 1 0
N S 9 7 5 0 H a r d w a r e R e f e r e n c e
DMA Control and Status registers
The configuration registers for DMA1 are located at
0x9000 0000
. The configuration
registers for DMA2 are located at
0x9011 0000
. All configuration registers must be
accessed as 32-bit words and as single accesses only. Bursting is not allowed.
Table 311 is a single DMA controller address map.
Important:
Be aware that the registers listed in this table are not discrete registers;
they are combined with other information and stored in the context SRAM
DMA2
1
USB device control-OUT endpoint #0
FBW
DMA2
2
USB device control-IN endpoint #0
FBR
DMA2
3
USB device endpoint#1
FBRW
DMA2
4
USB device endpoint#2
FBRW
DMA2
5
USB device endpoint#3
FBRW
DMA2
6
USB device endpoint#4
FBRW
DMA2
7
USB device endpoint#5
FBRW
DMA2
8
USB device endpoint#6
FBRW
DMA2
9
USB device endpoint#7
FBRW
DMA2
10
USB device endpoint#8
FBRW
DMA2
11
USB device endpoint#9
FBRW
DMA2
12
USB device endpoint#10
FBRW
DMA2
13
USB device endpoint#11
FBRW
DMA2
14
Unused
N/A
DMA2
15
Unused
N/A
DMA2
16
Unused
N/A
DMA
Channel
DMA channel peripheral
Fly-by direction
Table 310: DMA channel assignments