Digi NS9750 User Manual

Page 211

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w w w . d i g i e m b e d d e d . c o m

1 8 7

M e m o r y C o n t r o l l e r

Table 119 shows the outputs from the memory controller and the corresponding
inputs to the 64M SDRAM (4Mx16, pins 13 and 14 used as bank selects).

4

4

16

5

3

3

15

4

2

2

14

3

1

1

13

2

0

0

12

**

Output address
(

ADDROUT

)

Memory device
connections

AHB address to row
address

AHB address to
column address

14

BA1

9

9

13

BA0

10

10

12

-

-

-

11

11

22

-

10

10/AP

21

AP

9

9

20

-

8

8

19

-

7

7

18

8

6

6

17

7

5

5

16

6

4

4

15

5

3

3

14

4

2

2

13

3

1

1

12

2

0

0

11

**

Table 119: Address mapping for 64M SDRAM (4Mx16, RBC)

Output address
(

ADDROUT

)

Memory device
connections

AHB address to row
address

AHB address to
column address

Table 118: Address mapping for 16M SDRAM (2Mx8, RBC)

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