Mii management read data register, Mii management indicators register, Register bit assignment – Digi NS9750 User Manual
Page 387: Table 222: mii management read data register
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E t h e r n e t C o m m u n i c a t i o n M o d u l e
MII Management Read Data register
Address: A060 0430
Register bit assignment
MII Management Indicators register
Address: A060 0434
Bits
Access
Mnemonic
Reset
Description
D31:16
N/A
Reserved
N/A
N/A
D15:00
R
MRDD
0x0000
MII read data
Read data is obtained by reading from this register
after an MII Management read cycle. An MII
Management read cycle is executed by loading the
MII Management Address register, then setting the
READ bit to 1 in the MII Management Command
register (see page 360). Read data is available after the
BUSY bit in the MII Management Indicators register
(see page 363) returns to 0.
Table 222: MII Management Read Data register
Reserved
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
MRDD
Reserved
MIILF
BUSY
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved
N
VALID SCAN