Digi NS9750 - Manual (Page 536)

D M A C o n t r o l a n d S t a t u s r e g i s t e r s
5 1 2 N S 9 7 5 0 H a r d w a r e R e f e r e n c e
DMA Buffer Descriptor Pointer
Address: DMA1
9000 0130 / 9011 0130 DMA Channel 10 Control register
9000 0150 / 9011 0150 DMA Channel 11 Control register
9000 0170 / 9011 0170 DMA Channel 12 Control register
9000 0190 / 9011 0190 DMA Channel 13 Control register
9000 01B0 / 9011 01B0 DMA Channel 14 Control register
9000 01D0 / 9011 01D0 DMA Channel 15 Control register
9000 01F0 / 9011 01F0 DMA Channel 16 Control register
9000 0014 / 9011 0014 DMA Channel 1 Status/Interrupt Enable register
9000 0034 / 9011 0034 DMA Channel 2 Status/Interrupt Enable register
9000 0054 / 9011 0054 DMA Channel 3 Status/Interrupt Enable register
9000 0074 / 9011 0074 DMA Channel 4 Status/Interrupt Enable register
9000 0094 / 9011 0094 DMA Channel 5 Status/Interrupt Enable register
9000 00B4 / 9011 00B4 DMA Channel 6 Status/Interrupt Enable register
9000 00D4 / 9011 00D4 DMA Channel 7 Status/Interrupt Enable register
9000 00F4 / 9011 00F4 DMA Channel 8 Status/Interrupt Enable register
9000 0114 / 9011 0114 DMA Channel 9 Status/Interrupt Enable register
9000 0134 / 9011 0134 DMA Channel 10 Status/Interrupt Enable register
9000 0154 / 9011 0154 DMA Channel 11 Status/Interrupt Enable register
9000 0174 / 9011 0174 DMA Channel 12 Status/Interrupt Enable register
9000 0194 / 9011 0194 DMA Channel 13 Status/Interrupt Enable register
9000 01B4 / 9011 01B4 DMA Channel 14 Status/Interrupt Enable register
9000 01D4 / 9011 01D4 DMA Channel 15 Status/Interrupt Enable register
9000 01F4 / 9011 01F4 DMA Channel 16 Status/Interrupt Enable register
Offset Description
Table 311: DMA Control and Status register address map