Digi NS9750 User Manual

Page 197

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w w w . d i g i e m b e d d e d . c o m

1 7 3

M e m o r y C o n t r o l l e r

Table 102 shows the outputs from the memory controller and the corresponding
inputs to the 512M SDRAM (32Mx16, pins 13 and 14 used as bank selects).

11

11

25

-

10

10/AP

24

AP

9

9

23

11

8

8

22

10

7

7

21

9

6

6

20

8

5

5

19

7

4

4

18

6

3

3

17

5

2

2

16

4

1

1

15

3

0

0

14

2

Output address
(

ADDROUT

)

Memory device
connections

AHB address to row
address

AHB address to
column address

14

BA1

13

13

13

BA0

12

12

12

12

26

-

11

11

25

-

10

10/AP

24

AP

9

9

23

11

8

8

22

10

7

7

21

9

Table 102: Address mapping for 512M SDRAM (32Mx16, RBC)

Output address
(

ADDROUT

)

Memory device
connections

AHB address to row
address

AHB address to
column address

Table 101: Address mapping for 256M SDRAM (32Mx8, RBC)

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