Example – Digi NS9750 User Manual

Page 249

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M e m o r y C o n t r o l l e r

Example

Static memory read/write time = 16 us

CLK frequency = 50 MHz

This value must be programmed into the Static Memory Extended Wait register:

(16 x 10

-6

x 50 x 10

6

/ 16) - 1 = 49

Dynamic Memory Configuration 0–3 registers

Address: A070 0100 / 0120 / 0140 / 0160
The Dynamic Memory Configuration 0–3 registers allow you to program the
configuration information for the relevant dynamic memory chip select. These
registers are usually modified only during system initialization.

Register bit assignment

Bits

Access

Mnemonic

Description

D31:21

N/A

Reserved

N/A (do not modify)

D20

R/W

Protect

Write protect

0

Writes not protected (reset value on

reset_n

)

1

Write protected

D19

R/W

BDMC

Buffer enable

0

Buffer disabled for accesses to this chip select (reset value on

reset_n

)

1

Buffer enabled for accesses to this chip select. The buffers must
be disabled during SDRAM initialization. The buffers must be
enabled during normal operation.

D18:15

N/A

Reserved

N/A (do not modify)

Table 156: Dynamic Memory Configuration 0–3 registers

Rsvd

13

12

11

10

9

8

7

6

5

4

3

2

1

0

15

14

Rsvd

AM

31

29

28

27

26

25

24

23

22

21

20

19

18

17

16

30

Reserved

Protect BDMC

Reserved

AM1

Reserved

MD

Reserved

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