Pci bridge ahb error address register, Pci bridge pci error address register – Digi NS9750 User Manual

Page 457

Advertising
background image

w w w . d i g i e m b e d d e d . c o m

4 3 3

P C I - t o - A H B B r i d g e

PCI Bridge AHB Error Address register

Address: A030 0024

The PCI Bridge AHB Error Address register stores the address of the AHB transaction
that received an AHB ERROR response.

Register bit assignment

PCI Bridge PCI Error Address register

Address: A030 0028

D01:00

R/W

AHBBRST

0x1

AHB burst length control

Determines the type of burst cycles done when the
bridge acts as AHB master:

00

16

01

32 (default)

10

64

11

Reserved

Bits

Access

Mnemonic

Reset

Description

D31:00

R

AHBEADR

0x00000000

AHB error address

Holds the AHB address that caused the error, when
AHBERR is set in the PCI Bridge Interrupt Status
register.

No further updates are allowed to this register until
AHBERR is cleared,

Table 269: PCI Bridge AHB Error Address register

Bits

Access

Mnemonic

Reset

Description

Table 268: PCI Bridge Configuration register

AHBEADR

13

12

11

10

9

8

7

6

5

4

3

2

1

0

15

14

31

29

28

27

26

25

24

23

22

21

20

19

18

17

16

30

AHBEADR

Advertising