Digi NS9750 User Manual

Page 878

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I n d e x - 8

TX Error Buffer Descriptor Pointer

register

390

Ethernet front-end module

about

323

Ethernet slave interface

330

features

316

interrupts

331

power down mode

324

receive packet processor

324

resets

332

transferring a frame to system

memory

325

transmit packet processor

327

transmitting a frame to the Ethernet

MAC

330

Ethernet General Control Register #1

339

Ethernet General Control Register #2

342

Ethernet General Status register

344

Ethernet interface pinout

25

Ethernet Interrupt Enable register

387

Ethernet Interrupt Status register

385

Ethernet MAC

315

,

317

-

322

about

317

external clocks

14

features

316

,

318

PHY interface mappings

320

station address logic (SAL)

321

statistics module

321

Ethernet Media Access Controller. See

Ethernet MAC

.

Ethernet Receive Status register

347

Ethernet slave interface

330

Ethernet timing

813

-

815

Ethernet Transmit Status register

344

Extended Control register

698

extended wait transfers

122

Extensibility Byte Requested by Host

retgister

698

extensibility byte values

676

external aborts

102

external CAM filtering

334

-

336

CAM controller

334

External Interrupt 0-3 Control register

313

external interrupts

7

external pad interface signals

575

external peripheral

5

external system bus interface

2

external-peripheral-initiated DMA transfer

(AHB)

474

F

fast interrupts. See

FIQ interrupts.

Feature Control Register A

694

Feature Control Register B

695

FIFO Interrupt Enable registers

776

-

780

FIFO Interrupt Enable 0 register

776

FIFO Interrupt Enable 1 register

777

FIFO Interrupt Enable 2 register

778

FIFO Interrupt Enable 3 register

779

FIFO Interrupt Status registers

769

-

775

FIFO Interrupt Status 0 register

771

FIFO Interrupt Status 1 register

771

FIFO Interrupt Status 2 register

773

FIFO Interrupt Status 3 register

775

FIFO management

605

-

608

,

647

-

650

FIFO Packet Control registers

780

FIFO Status and Control registers

781

FIFO Status register

684

filtering options, station address logic

321

fine page tables

85

,

88

,

90

,

93

FIQ interrupts

267

flash boot

10

fly-by DMA transfers

502

fly-by memory-to-peripheral

operations

505

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