Digi NS9750 User Manual
Page 221
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M e m o r y C o n t r o l l e r
Table 131 shows the outputs from the memory controller and the corresponding
inputs to the 128M SDRAM (8Mx16, pins 13 and 14 used as bank selects).
Table 132 shows the outputs from the memory controller and the corresponding
inputs to the 128 SDRAM (16Mx8, pins 13 and 14 used as bank selects).
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA1
23
23
13
BA0
22
22
12
-
-
-
11
11
21
-
10
10/AP
20
AP
9
9
19
-
8
8
18
9
7
7
17
8
6
6
16
7
5
5
15
6
4
4
14
5
3
3
13
4
2
2
12
3
1
1
11
2
0
0
10
**
Table 131: Address mapping for 128M SDRAM (8Mx16, BRC)
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA1
23
23
13
BA0
24
24
12
-
-
-
Table 132: Address mapping for 128M SDRAM (16Mx8, BRC)