Hcbulkheaded register, Register bit assignment, Table 432: hccontrolcurrented register – Digi NS9750 User Manual
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U S B C o n t r o l l e r M o d u l e
Register bit assignment
HcBulkHeadED register
Address: 9010 1028
The HcBulkHeadED register contains the physical address of the first endpoint
descriptor of the bulk list.
Bits
Access
Mnemonic
Reset
Description
D31:04
R/W
CCED
0h
ControlCurrentED
This pointer is advanced to the next endpoint descriptor
after serving the present one. The host controller continues
processing the list from where it left off in the last frame.
When it reaches the end of the control list, the host
controller checks the ControlListFilled field (see
"HcCommandStatus register," beginning on page 730). If
the ControlListFilled field is set, the host controller copies
the content of the HcControlHeadED register to this
register and clears the bit. If the ControlListFilled field is
not set, the host controller does nothing.
The host controller driver is allowed to modify this
register only when the ControlListEnable field (see
"HcControl register," beginning on page 727) is cleared.
When the ControlListEnable field is set, the host
controller driver only reads the instantaneous value of this
register. Initially, this value is set to zero to indicate the
end of the control list.
D03:00
N/A
Not used
0
Must be written to 0.
Table 432: HcControlCurrentED register
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
BHED
Not used
BHED