Digi NS9750 User Manual
Page 183
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1 5 9
M e m o r y C o n t r o l l e r
Access: Read, big endian, 16-bit external
bus
External data mapping on to system
databus
Internal
transfer
width
HRDATA to DATA
HSIZE
[2:0]
HADDR
[1:0]
ADDROUT
[1:0]
BLSOU
T [1:0]
[31:24]
23:16]
[15:8]
[7:0]
Word (2
transfers
010
--
1-
0-
00
00
-
[15:8]
-
[7:0]
[15:8]
-
[7:0]
-
Halfword
001
1-
1-
00
-
-
[15:8]
[7:0]
Halfword
001
0-
0-
00
[15:8]
[7:0]
-
-
Byte
000
11
1-
10
-
-
-
[7:0]
Byte
000
10
1-
01
-
-
[15:8]
-
Byte
000
01
0-
10
-
[7:0]
-
-
Byte
000
00
0-
01
[15:8]
-
-
-
Table 86: Big endian read, 16-bit external bus
Access: Read, big endian, 32-bit external
bus
External data mapping on to system
databus
Internal
transfer
width
HRDATA to DATA
HSIZE
[2:0]
HADDR
[2:1]
ADDROUT
[1:0]
BLSOU
T [3:0]
[31:24]
23:16]
[15:8]
[7:0]
Word
010
--
--
0000
[31:24]
[23:16]
[15:8]
[7:0]
Halfword
001
1-
--
1100
-
-
[15:8]
[7:0]
Halfword (2
transfers)
001
0-
--
0011
[31:24]
[23:16]
-
-
Byte
000
11
--
1110
-
-
-
[7:0]
Byte
000
10
--
1101
-
-
[15:8]
-
Table 87: Big endian read, 32-bit external bus