Master reset register – Digi NS9750 User Manual
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B B u s U t i l i t y
Master Reset register
Address: 9060 0000
The Master Reset register contains the reset control signals for all BBus peripherals.
All BBus peripherals, except the bridge, are held in reset after power-on reset is
deasserted. All reset bits in this register are active high.
Register bit assignment
Bits
Access
Mnemonic
Reset
Description
D31:13
R
Not used
0x0
Always read as 0x0.
D12:08
N/A
Reserved
N/A
N/A
D07
R/W
I
2
C
1
I
2
C Controller reset
D06
R/W
1284
1
IEEE 1284 Controller reset
D05
R/W
SerD
1
Serial Controller port D reset
D04
R/W
SerC
1
Serial Controller port C reset
D03
R/W
SerA
1
Serial Controller port A reset
D02
R/W
SerB
1
Serial Controller port B reset
D01
R/W
USB
1
USB Controller reset
D00
R/W
DMA
1
BBus DMA reset
Table 316: Master Reset register
I2C
1284
SerD
SerC
SerA
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Not used
Reserved
USB
DMA
SerB
Not used