Digi NS9750 - Manual (Page 854)

S P I t i m i n g
8 3 0 N S 9 7 5 0 H a r d w a r e R e f e r e n c e
SPI slave mode 0 and 1: 2-byte transfer
(see note 7)
Figure 138: SPI slave mode 0 and 1 (2-byte transfer)
SPI slave mode 2 and 3: 2-byte transfer
(see note 7)
Figure 139: SPI slave mode 2 and 3 (2-byte transfer)
MSB LSB MSB LSB
MSB LSB MSB LSB
SP19 SP17
SP21 SP20
S23 SP18 SP15
S22 SP25 SP25
SP24 SP24
SP26 SP26 SP16 SP14
SPI CLK In (Mode 0)
SPI CLK In (Mode 1)
SPI Enable
SPI Data Out
SPI Data In
MSB LSB MSB LSB
MSB LSB MSB LSB
SP19 SP17
SP21 SP20
S23 SP18 SP15
S22 SP16 SP14
SPI CLK In (Mode 2)
SPI CLK In (Mode 3)
SPI Enable
SPI Data Out
SPI Data In