Digi NS9750 - Manual (Page 194)

D y n a m i c m e m o r y c o n t r o l l e r
1 7 0 N S 9 7 5 0 H a r d w a r e R e f e r e n c e
Table 98 shows the outputs from the memory controller and the corresponding inputs
to the 128M SDRAM (16Mx8, pins 13 and 14 used as bank selects).
6 6 19 8
5 5 18 7
4 4 17 6
3 3 16 5
2 2 15 4
1 1 14 3
0 0 13 2
Output address
(
ADDROUT )
Memory device
connections AHB address to row
address AHB address to
column address
14 BA1 13 13
13 BA0 12 12
12 12 - -
11 11 25 -
10 10/AP 24 AP
9 9 23 11
8 8 22 10
7 7 21 9
6 6 20 8
5 5 19 7
4 4 18 6
3 3 17 5
2 2 16 4
Table 98: Address mapping for 128 SDRAM (16Mx8, RBC)
Output address
(
ADDROUT )
Memory device
connections AHB address to row
address AHB address to
column address
Table 97: Address mapping for 128 SDRAM (8Mx16, RBC)