Digi NS9750 User Manual
Page 224
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D y n a m i c m e m o r y c o n t r o l l e r
2 0 0
N S 9 7 5 0 H a r d w a r e R e f e r e n c e
Table 135 shows the outputs from the memory controller and the corresponding
inputs to the 512M SDRAM (32Mx16, pins 13 and 14 used as bank selects).
1
1
12
2
0
0
11
**
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA1
25
25
13
BA0
24
24
12
12
23
-
11
11
22
-
10
10/AP
21
AP
9
9
20
10
8
8
19
9
7
7
18
8
6
6
17
7
5
5
16
6
4
4
15
5
3
3
14
4
2
2
13
3
1
1
12
2
0
0
11
**
Table 135: Address mapping for 512M SDRAM (32Mx16, BRC)
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
Table 134: Address mapping for 256M SDRAM (32Mx8, BRC)
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