Hcperiodicstart register, Register bit assignment – Digi NS9750 User Manual
Page 774
U S B h o s t b l o c k r e g i s t e r s
7 5 0
N S 9 7 5 0 H a r d w a r e R e f e r e n c e
Register bit assignment
HcPeriodicStart register
Address: 9010 1040
Register bit assignment
Bits
Access
Mnemonic
Reset
Description
D31:16
N/A
Reserved
N/A
N/A
D15:00
R
FN
0h
FrameNumber
Incremented when the HcFmRemaining register (see
"HcFmRemaining register" on page 748) is reloaded. The
frame number will be rolled over to
0h
after
ffffh
. When
entering the USB operational state, FrameNumber is
incremented automatically. The content is written to
HCCA after the host controller has incremented
FrameNumber at each frame boundary and sent a SOF but
before HC reads the first endpoint descriptor in that frame.
After writing to HCCa, the host controller sets the
StartofFrame field in the HcInterruptStatus register (see
"HcInterruptStatus register" on page 733).
Table 438: HcFmNumber register
Bits
Access
Mnemonic
Reset
Description
D31:14
N/A
Reserved
N/A
N/A
Table 439: HcPeriodicStart register
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved
PeriodicStart (PS)
Reserved