Digi NS9750 - Manual (Page 754)

U S B h o s t b l o c k r e g i s t e r s
7 3 0 N S 9 7 5 0 H a r d w a r e R e f e r e n c e
HcCommandStatus register
Address: 9010 1008
D03 R/W IE 0b IsochronousEnable
Enables/disables processing of the isochronous EDs.
While processing the periodic list in a frame, the host
controller checks the status of this bit when it finds an
isochronous ED (F=1).
If set (enabled), the host controller continues
processing the EDs.
If cleared (disabled), the host controller stops
processing of the periodic list (which now contains
only isochronous EDs) and begins processing the
bulk/control lists.
Setting this bit is guaranteed to take effect in the next
frame — not the current frame.
D02 R/W PLE 0b PeriodicListEnable
Set to enable the processing of the periodic list in the next
frame. If cleared by the host controller driver, the periodic
list is not processed after the next SOF. The host controller
must check this bit before it starts processing the list.
D01:00 R/W CBSR 00b ControlBulkServiceRatio
Specifies the service ratio between control and bulk
endpoint descriptors (EDs). Before processing any of the
nonperiodic lists, the host controller must compare the
ratio specified with its internal count on how many
nonempty control EDs have been processed, to determine
whether to continue serving another control ED or switch
to a bulk ED. The internal count is retained when crossing
the frame boundary. In the case of a reset, the host
controller driver is responsible for restoring this value.
CBSR # of control EDs over bulk EDs served
0 1 : 1
1 2 : 1
2 3 : 1
3 4 : 1
Bits Access Mnemonic Reset Description
Table 424: HcControl register