Digi NS9750 - Manual (Page 73)

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W o r k i n g w i t h t h e C P U
Figure 10 shows the main blocks in the ARM926EJ-S processor.
Figure 10: ARM926EJ-S processor block diagram
Instruction sets
The processor executes three instruction sets:
32-bit ARM instruction set
16-bit Thumb instruction set
8-bit Java instruction set
DEXT
Write buffer
DCACHE
Cache
PA
TAGRAM
writeback
write
buffer
MMU
TLB ARM926EJ-S
IROUTE
DROUTE
FCSE
WDATA RDATA
INSTR
ICACHE
IEXT
Bus
interface
unit
Data
AHB
interface
Instruction
AHB
interface
AHB
AHB
DA
IA
DMVA
IMVA