Digi NS9750 User Manual

Page 215

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w w w . d i g i e m b e d d e d . c o m

1 9 1

M e m o r y C o n t r o l l e r

Table 124 shows the outputs from the memory controller and the corresponding
inputs to the 256M SDRAM (32Mx8, pins 13 and 14 used as bank selects).

1

1

13

2

0

0

12

**

Output address
(

ADDROUT

)

Memory device
connections

AHB address to row
address

AHB address to
column address

14

BA1

11

11

13

BA0

12

12

12

12

25

-

11

11

24

-

10

10/AP

23

AP

9

9

22

10

8

8

21

9

7

7

20

8

6

6

19

7

5

5

18

6

4

4

17

5

3

3

16

4

2

2

15

3

1

1

14

2

0

0

13

**

Table 124: Address mapping for 256M SDRAM (32Mx8, RBC)

Output address
(

ADDROUT

)

Memory device
connections

AHB address to row
address

AHB address to
column address

Table 123: Address mapping for 256M SDRAM (16Mx16, RBC)

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