Digi NS9750 User Manual
Page 254
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N S 9 7 5 0 H a r d w a r e R e f e r e n c e
Static Memory Configuration 0–3 registers
Address: A070 0200 / 0220 / 0240 / 0260
The Static Memory Configuration 0–3 registers configure the static memory
configuration. It is recommended that these registers be modified during system
initialization, or when there are no current or outstanding transactions. Wait until
the memory controller is idle, then enter low-power or disabled mode.
Register bit assignment
Bits
Access
Mnemonic
Description
D31:21
N/A
Reserved
N/A (do not modify)
D20
R/W
PSMC
Write protect
0
Writes not protected (reset value on
reset_n
)
1
Write protected
D19
R/W
BSMC
Buffer enable
0
Write buffer disabled (reset value on
reset_n
)
1
Write buffer enabled
Note:
This field must always be set to 0 when a peripheral other
than SRAM is attached to the static ram chip select.
D18:09
N/A
Reserved
N/A (do not modify)
Table 159: Static Memory Configuration 0–3 registers
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved
PSMC BSMC
Reserved
Reserved
EW
PB
PC
Reserved
PM
Rsvd
MW