Digi NS9750 - Manual (Page 677)

w w w . d i g i e m b e d d e d . c o m 6 5 3
S e r i a l C o n t r o l M o d u l e : S P I
D20 R/W LL 0 Local loopback
Provides an internal local loopback feature.
When LL is set to 1, the internal receive data stream is
connected to the TXD output signal. LL connects the
serial channel receiver directly to the serial channel
transmitter.
This field is used primarily as a test vehicle for the serial
channel driver firmware.
D19:12 R/W Not used 0 This field should be written to 0.
D11:09 R/W RIE 0x00 Receive interrupt enable
0 Disables the interrupt
1 Enables the interrupt
Allows you to enable interrupts for different receive errors
and conditions.
[11] Receive register ready
[10] Receive FIFO half-full
[09] Receive buffer closed
D08 R/W ERXDMA 0 Enable receive DMA
Enables the receiver to interact with a DMA channel.
The channel is configured to operate in DMA mode when
ERXDMA is set to 1. In DMA mode, the DMA controller
empties the receive data FIFO and delivers the data to
memory. The receive status information from Status
Registers B and C are moved automatically to the receive
DMA buffer descriptor.
This bit is cleared to pause the receiver.
D07:05 N/A Reserved N/A N/A
D04:01 R/W TIC 0x0 Transmitter interrupt condition
Defines the interrupt enables for a transmitter interrupt:
[4] Change in CTS interrupt enable
[3] Transmit register empty interrupt enable
[2] Transmit FIFO half-empty interrupt enable
[1] Transmit buffer closed interrupt enable
Bits Access Mnemonic Reset Description
Table 384: Serial Channel B/A/C/D Control Register A