Digi NS9750 - Manual (Page 19)

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Memory timing .........................................................................795
SDRAM burst read (16-bit) .....................................................796
SDRAM burst read (16-bit), CAS latency = 3 ................................797
SDRAM burst write (16-bit) ....................................................798
SDRAM burst read (32-bit) .....................................................799
SDRAM burst read (32-bit), CAS latency = 3 ................................800
SDRAM burst write (32-bit) ....................................................801
SDRAM load mode...............................................................802
SDRAM refresh mode ...........................................................803
Clock enable timing ............................................................803
Static RAM read cycles with 0 wait states ..................................805
Static RAM asynchronous page mode read, WTPG = 1 ....................806
Static RAM read cycle with configurable wait states .....................807
Static RAM sequential write cycles ..........................................808
Static RAM write cycle .........................................................809
Static write cycle with configurable wait states...........................810
Slow peripheral acknowledge timing ........................................811
Ethernet timing ........................................................................813
Ethernet MII timing .............................................................814
Ethernet RMII timing ...........................................................815
PCI timing...............................................................................816
Internal PCI arbiter timing ....................................................818
PCI burst write from NS9750 timing .........................................818
PCI burst read from NS9750 timing ..........................................819
PCI burst write to NS9750 timing.............................................819
PCI burst read to NS9750 timing..............................................820
PCI clock timing.................................................................820
I2C timing ...............................................................................821
LCD timing ..............................................................................822
Horizontal timing for STN displays ...........................................824
Vertical timing for STN displays ..............................................825
Horizontal timing for TFT displays ...........................................825
Vertical timing for TFT displays ..............................................825
HSYNC vs VSYNC timing for STN displays....................................826
HSYNC vs VSYNC timing for TFT displays....................................826
LCD output timing ..............................................................826
SPI timing ...............................................................................827