Digi NS9750 - Manual (Page 11)

i x
RX_D Buffer Descriptor Pointer register ....................................384
Ethernet Interrupt Status register ...........................................385
Ethernet Interrupt Enable register...........................................387
TX Buffer Descriptor Pointer register........................................389
Transmit Recover Buffer Descriptor Pointer register .....................389
TX Error Buffer Descriptor Pointer register.................................390
RX_A Buffer Descriptor Pointer Offset register ............................391
RX_B Buffer Descriptor Pointer Offset register ............................392
RX_C Buffer Descriptor Pointer Offset register ............................393
RX_D Buffer Descriptor Pointer Offset register ............................393
Transmit Buffer Descriptor Pointer Offset register........................394
RX Free Buffer register ........................................................395
TX buffer descriptor RAM......................................................396
Sample hash table code ..............................................................397
C h a p t e r 7 : P C I - t o - A H B B r i d g e ............................................................................ 403
About the PCI-to-AHB Bridge ........................................................404
PCI-to-AHB bridge functionality ..............................................405
Cross-bridge transaction error handling.....................................407
AHB address decoding and translation ......................................408
PCI address decoding and mapping ..........................................408
Interrupts ........................................................................409
Transaction ordering ...........................................................410
Endian configuration ...........................................................411
Configuration registers.........................................................411
Bridge Configuration registers ................................................413
PCI bus arbiter .........................................................................418
PCI arbiter functional description............................................419
Slave interface ..................................................................420
PCI Arbiter Configuration registers ..........................................420
PCI system configurations ............................................................456
Device selection for configuration ...........................................458
PCI interrupts....................................................................458
PCI central resource functions................................................458
CardBus Support .......................................................................461
Configuring NS9750 for CardBus support ....................................463
CardBus adapter requirements ...............................................464