Digi NS9750 User Manual
Page 217
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w w w . d i g i e m b e d d e d . c o m
1 9 3
M e m o r y C o n t r o l l e r
Table 126 shows the outputs from the memory controller and the corresponding
inputs to the 512M SDRAM (64Mx8, pins 13 and 14 used as bank selects).
16-bit wide databus address mappings (BRC)
Table 127 through Table 136 show 16-bit wide databus address mappings for SDRAM
(BRC) devices.
Table 127 shows the outputs from the memory controller and the corresponding
inputs to the 16M SDRAM (1Mx16, pin 13 used as bank select).
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA1
13
13
13
BA0
12
12
12
12
26
-
11
11
25
11
10
10/AP
24
AP
9
9
23
10
8
8
22
9
7
7
21
8
6
6
20
7
5
5
19
6
4
4
18
5
3
3
17
4
2
2
16
3
1
1
15
2
0
0
14
**
Table 126: Address mapping for 512M SDRAM (64Mx8, RBC)
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