Digi NS9750 User Manual

Page 207

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w w w . d i g i e m b e d d e d . c o m

1 8 3

M e m o r y C o n t r o l l e r

Table 114 shows the outputs from the memory controller and the corresponding
inputs to the 256M SDRAM (32Mx8, pins 13 and 14 used as bank selects).

1

1

12

3

0

0

11

2

Output address
(

ADDROUT

)

Memory device
connections

AHB address to row
address

AHB address to
column address

14

BA1

25

25

13

BA0

26

26

12

12

24

-

11

11

23

-

10

10/AP

22

AP

9

9

21

11

8

8

20

10

7

7

19

9

6

6

18

8

5

5

17

7

4

4

16

6

3

3

15

5

2

2

14

4

1

1

13

3

0

0

12

2

Table 114: Address mapping for 256M SDRAM (32Mx8, BRC)

Output address
(

ADDROUT

)

Memory device
connections

AHB address to row
address

AHB address to
column address

Table 113: Address mapping for 256M SDRAM (16Mx16, BRC)

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