Digi NS9750 - Manual (Page 591)

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L C D C o n t r o l l e r
Figure 86: LCD controller block diagram
AHB slave interface Timing controller
Panel clock
generator
AHB master
interface
DMA FIFO
controller
Pixel
serializer
Upper
half-word
Lower
half-word
Greyscaler
Register/palette
programming
LCD panel
control signals
LCD panel
clock
Upper
panel
FIFO
Lower
panel
FIFO
Frame buffer
access
Bit 0
Palette RAM external
Palette
TRUE
COLOR
Upper panel
formatter
Lower panel
formatter
LCD panel data
TFT
TFT panel
data