Fifo interrupt enable 3 register – Digi NS9750 User Manual
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U S B C o n t r o l l e r M o d u l e
FIFO Interrupt Enable 3 register
Address: 9010 3034
D21
R/W
ERROR9
0
Generate an interrupt when ERROR9 in FIFO Interrupt
Status 2 register is asserted.
D20:16
N/A
Reserved
N/A
Not valid in DMA mode.
D15
R/W
ACK8
0
Generate an interrupt when ACK8 in FIFO Interrupt
Status 2 register is asserted.
D14
R/W
NACK8
0
Generate an interrupt when NACK8 in FIFO Interrupt
Status 2 register is asserted.
D13
R/W
ERROR8
0
Generate an interrupt when ERROR8 in FIFO Interrupt
Status 2 register is asserted.
D12:08
N/A
Reserved
N/A
Not valid in DMA mode.
D07
R/W
ACK7
0
Generate an interrupt when ACK7 in FIFO Interrupt
Status 2 register is asserted.
D06
R/W
NACK7
0
Generate an interrupt when NACK7 in FIFO Interrupt
Status 2 register is asserted.
D05
R/W
ERROR7
0
Generate an interrupt when ERROR7 in FIFO Interrupt
Status 2 register is asserted.
D04:00
N/A
Reserved
N/A
Not valid in DMA mode.
Bits
Access
Mnemonic
Reset
Description
Table 456: FIFO Interrupt Enable 2 register
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Not used
ERROR
12
Reserved
ACK
12
NACK
12
Reserved
ACK
11
NACK
11
ERROR
11
ERROR
13
NACK
13
ACK
13
Reserved