Digi NS9750 User Manual
Page 219
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1 9 5
M e m o r y C o n t r o l l e r
Table 129 shows the outputs from the memory controller and the corresponding
inputs to the 64M SDRAM (4Mx16, pins 13 and 14 used as bank selects).
9
9
19
-
8
8
18
9
7
7
17
8
6
6
16
7
5
5
15
6
4
4
14
5
3
3
13
4
2
2
12
3
1
1
11
2
0
0
10
**
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA1
21
21
13
BA0
22
22
12
-
-
-
11
11
20
-
10
10/AP
19
AP
9
9
18
-
8
8
17
-
7
7
16
8
6
6
15
7
5
5
14
6
Table 129: Address mapping for 64M SDRAM (4Mx16, BRC)
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
Table 128: Address mapping for 16M SDRAM (2Mx8, BRC)
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