Digi NS9750 - Manual (Page 345)

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E t h e r n e t C o m m u n i c a t i o n M o d u l e
Station address logic (SAL)
The station address logic module examines the destination address field of incoming
frames, and filters the frames before they are stored in the Ethernet front-end
module. The filtering options, listed next, are programmed in the Station Address
Filter register (see page 366).
Accept frames to destination address programmed in the SA1, SA2, and SA3
registers (Station Address registers, beginning on page 364)
Accept all frames
Accept all multicast frames
Accept all multicast frames using HT1 and HT2 registers (Hash Table
registers, beginning on page 366)
Accept all broadcast frames
The filtering conditions are independent of each other; for example, the Station
Address Logic register can be configured to accept all broadcast frames, and frames
to the programmed destination address.
The MAC receiver provides the station address logic with a 6-bit CRC value that is the
upper 6 bits of a 32-bit CRC calculation performed on the 48-bit multicast destination
address. This 6-bit value addresses the 64-bit multicast hash table created in the HT1
and HT2 registers (see "Register Hash Tables" on page 366). If the current receive
frame is a multicast frame and the 6-bit CRC addresses a bit in the hash table that is
set to 1, the receive frame is accepted; otherwise, the frame is rejected. See
"Sample hash table code," beginning on page 397, for sample C code to calculate hash
table entries.
Statistics module
The Statistics module counts and saves Ethernet statistics in several counters (see
"Statistics registers" on page 368).
The Ethernet General Control Register #2 contains three statistics module
configuration bits:
AUTOZ. Enable statistics counter clear on read.
CLRCNT. Clear statistics counters.
STEN. Enable statistics counters.