Digi NS9750 User Manual
Page 214
Advertising
D y n a m i c m e m o r y c o n t r o l l e r
1 9 0
N S 9 7 5 0 H a r d w a r e R e f e r e n c e
Table 123 shows the outputs from the memory controller and the corresponding
inputs to the 256M SDRAM (16Mx16, pins 13 and 14 used as bank selects).
6
6
19
7
5
5
18
6
4
4
17
5
3
3
16
4
2
2
15
3
1
1
14
2
0
0
13
**
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA1
11
11
13
BA0
10
10
12
12
24
-
11
11
23
-
10
10/AP
22
AP
9
9
21
-
8
8
20
9
7
7
19
8
6
6
18
7
5
5
17
6
4
4
16
5
3
3
15
4
2
2
14
3
Table 123: Address mapping for 256M SDRAM (16Mx16, RBC)
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
Table 122: Address mapping for 128M SDRAM (16Mx8, RBC)
Advertising