Digi NS9750 - Manual (Page 201)

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M e m o r y C o n t r o l l e r
Table 107 shows the outputs from the memory controller and the corresponding
inputs to the 64M SDRAM (4Mx16, pins 13 and 14 used as bank selects).
11 - - -
10 10/AP 20 AP
9 9 19 -
8 8 18 -
7 7 17 9
6 6 16 8
5 5 15 7
4 4 14 6
3 3 13 5
2 2 12 4
1 1 11 3
0 0 10 2
Output address
(
ADDROUT )
Memory device
connections AHB address to row
address AHB address to
column address
14 BA1 23 23
13 BA0 22 22
12 - - -
11 11 21 -
10 10/AP 20 AP
9 9 19 -
8 8 18 -
7 7 17 9
Table 107: Address mapping for 64M SDRAM (4Mx16, BRC)
Output address
(
ADDROUT )
Memory device
connections AHB address to row
address AHB address to
column address
Table 106: Address mapping for 64M SDRAM (2Mx32, BRC)