Siemens SINUMERIK 840C - Manual (Page 489)

7 Drive Machine Data (SIMODRIVE Drive MD) 07.97
7.3 611D drive machine data (FDD/MSD - as from SW 4)
7.3 611D drive machine data (FDD/MSD - as from SW 4)
7.3.1 Drive MD input (as from SW 4)
The drive machine data are provided for the purpose of matching the drives (FDD/MSD) and
the machine tool. If no setting values are specified by the machine manufacturer or the user,
then they must be carefully determined and optimized by the start-up engineer. The setting
values are input by means of menu selection (see section headed "Machine Data Dialog").
Notes:
• The machine data apply generally for FDD and MSD, but there are a few MDs that apply
specifically to FDD or MSD. Appropriate mention is made in such cases under the relevant
machine data.
• A number of motor-dependent machine data exist for the MSD. These machine data can
be identified by an "X" in the first position. The data for the 1st motor start with 1000,
those for the 2nd motor with 2000. (Example: motor rated speed MD X400 is MD 1400 for
motor 1 and MD 2400 for motor 2).
7.3.2 Drive MD (data description)
Current controller cycle 1000
Default value Lower input limit Upper input limit Units
125.0 62.5 125.0 µ s
Active on
Power On
The basic clock cycle of the module is derived from the current controller clock cycle of the
axis: Current controller clock cycle = Module basic clock cycle. The module basic clock cycle
is the basis for the generation of the interrupt signals for the processor and for the generation
of the inverter signals of the pulse-width modulator. Other clock cycles are derived from the
basic cycle by means of software functions.
Input values are 62.5 µ s or 125 µ s.
Notes:
• Intermediate values are not permissible (parameterization error).
• Exceeding the computing time on the current controller clock cycle level is not permissible
and will lead to tripping of the drive.
• In the case of double-axis modules, both drives must be parameterized with the same
current controller clock cycle (otherwise parameterization error).
Speed controller cycle 1001
Default value Lower input limit Upper input limit Units
125.0 62.5
125.0
500 (as from SW 6)
µ s
Active on
Power On
The speed controller clock cycle is derived from the current controller clock cycle of the axis:
Current controller clock cycle speed controller clock cycle. The time-slice management ZSV
(sequence control) is initialized with this machine data.
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SINUMERIK 840C (IA)