75 l_dflipflop_2, 75 l_dflipflop_2 8, L_dflipflop_2 – Lenze 8400 TopLine User Manual
Page 1488: 19 function library
19
Function library
19.1
Function blocks
1488
Lenze · 8400 TopLine · Reference manual · DMS 6.0 EN · 06/2014 · TD05/TD14
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If the bClr input = TRUE:
• Due to the priority bClr > bClk, bD the bOut output signal can be set any time to the FALSE status
by the bClr input signal = TRUE.
• The output signal is kept in this status independent of the other input signals.
19.1.75
L_DFlipFlop_2
The FB saves binary signals (DFlipFlop) in a clock-controlled way.
Inputs
Outputs
Identifier
Data type
Information/possible settings
bD
BOOL
Data input
bClk
BOOL
Clock input
• Only FALSE/TRUE edges are evaluated
bClr
BOOL
Reset input
TRUE
• The bOut output is set to FALSE.
• The bNegOut output is set to TRUE.
Identifier
Data type
Value/meaning
bOut
BOOL
Output signal
bNegOut
BOOL
Output signal, inverted
For a detailed functional description see
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E&ON
E&OU
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E2XW
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