Temperature compensation within the motor control, 5motor control (mctrl) – Lenze 8400 TopLine User Manual
Page 248
5
Motor control (MCTRL)
5.9
Servo control (SC)
248
Lenze · 8400 TopLine · Reference manual · DMS 6.0 EN · 06/2014 · TD05/TD14
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5.9.4.7
Temperature compensation within the motor control
This function extension is available from version 02.00.00!
A temperature compensation over the detected motor temperature (display in
) serves to
compensate inaccuracies in the output torque within the motor control in case of temperature
changes of the asynchronous or synchronous motor.
The temperature compensation is switched on/off bit-coded in
:
Note!
In the Lenze setting, the temperature compensation within the motor control is
activated. The temperature compensation, however, is only active with speed encoder
selection "3: Multi encoder" or "4: Resolver" in
as well as error-free KTY
temperature detection (display in
≠ 255 °C).
Behaviour in case the temperature compensation is not active
If the temperature compensation is not active,
• we assume a motor temperature of 20 °C when using an asynchronous motor. If the
asynchronous motor is at operating temperature, however, a too low actual torque
value is detected, especially in the field weakening range. This leads to a strong
decrease in the torque setting range.
• we assume a motor temperature of 150 °C when using a synchronous motor. If the
synchronous motor is cold, however, a too high actual torque value is detected. This
leads to a decrease in the torque setting range.
From version 14.00.00 onwards
, this negative behaviour in case of warm asynchronous
motors or cold synchronous motors can be improved by setting the option "warm
machine" (bit= "1") in
. We then assume a motor temperature of 90 °C.
Setting
Info
Bit 0 SC_PSM
KTY motor temperature compensation with servo control for synchronous motors:
• "0" ≡ Off
• "1" ≡ On (Lenze setting)
Bit 1 SC_ASM
KTY motor temperature compensation with servo control for asynchronous motors:
• "0" ≡ Off
• "1" ≡ On (Lenze setting)
Bit 2 ... 7 Reserved