2 wdevicestatusword status word, Wdevicestatusword status word, Wdevicestatusword – Lenze 8400 StateLine User Manual

Page 103: Status word, 4device control (dctrl)

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Lenze · 8400 StateLine · Reference manual · DMS 12.0 EN · 06/2014 · TD05/TD14

103

4

Device control (DCTRL)

4.4

Internal interfaces | "LS_DriveInterface" system block

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

4.4.2

wDeviceStatusWord status word

The wDeviceStatusWord status word provided by the control system contains all information

relevant for controlling the controller.

• The status word is sent as a process data word to the master control via a port block:

• The LP_CanOut1 port block if "CAN on board" is used or
• the LP_MciOut1 port block if a plugged-in communication module is used (e.g. PROFIBUS).

• Display parameter:

C00150

• The bit assignment of the wDeviceStatusWord status word can be seen from the table below.

Bit

Name

Status

Bit 0 FreeStatusBit0

Free status bit 0

Bit 1 PowerDisabled

1 ≡ Inverter control inhibited (pulse inhibit is active)

Bit 2 FreeStatusBit2

Free status bit 2 (not assigned, freely assignable)

Bit 3 FreeStatusBit3

Free status bit 3 (not assigned, freely assignable)

Bit 4 FreeStatusBit4

Free status bit 4 (not assigned, freely assignable)

Bit 5 FreeStatusBit5

Free status bit 5 (not assigned, freely assignable)

Bit 6 ActSpeedIsZero

During open-loop operation:

1 ≡ Speed setpoint < Comparison value (

C00024

)

During closed-loop operation:

1 ≡ Actual speed value < Comparison value (

C00024

)

Bit 7 ControllerInhibit

1 ≡ Controller inhibited (controller inhibit is active)

Bit 8 StatusCodeBit0

Bit coded display of the active device status

Device state machine and device states

(see table

[4-1]

)

Bit 9 StatusCodeBit1

Bit 10 StatusCodeBit2
Bit 11 StatusCodeBit3
Bit 12 Warning

1 ≡ A warning is indicated

Bit 13 Trouble

1 ≡ Controller is in the "

Trouble

" device status

• E.g. if an overvoltage has occurred.

Bit 14 FreeStatusBit14

Free status bit 14 (not assigned, freely assignable)

Bit 15 FreeStatusBit15

Free status bit 15 (not assigned, freely assignable)

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