14 l_dflipflop_1, L_dflipflop, L_dflipflop_1 – Lenze 8400 StateLine User Manual

Page 928: 17 function library

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17

Function library

17.1

Function blocks

928

Lenze · 8400 StateLine · Reference manual · DMS 12.0 EN · 06/2014 · TD05/TD14

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17.1.14

L_DFlipFlop_1

The FB saves binary signals (DFlipFlop) in a clock-controlled way.

Inputs

Outputs

Function
If the bClr input = FALSE, a signal edge at the bClk input switches the static input signal bD to the

bOut output, where it is retained:

Identifier

Data type

Information/possible settings

bD

BOOL

Data input

bClk

BOOL

Clock input

• Only FALSE/TRUE edges are evaluated

bClr

BOOL

Reset input

TRUE

• The bOut output is set to FALSE.

• The bNegOut output is set to TRUE.

Identifier

Data type

Value/meaning

bOut

BOOL

Output signal

bNegOut

BOOL

Output signal, inverted

/B')OLS)ORSB

E&ON

E&OU

E'

&/5

'

E2XW

E1HJ2XW

4

4

TRUE

TRUE

FALSE

FALSE

bClk

bOut

t

TRUE

FALSE

bD

t

t

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