Freescale Semiconductor MPC8260 - Manual (Page 1038)

ATM AAL1 Circuit Emulation Service
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
31-22 Freescale Semiconductor
Figure 31-20. Pointer verification mechanism
31.8 AAL-1 Memory Structure
The CPM manages ATM traffic by means of transmit and receive buffer descriptors (BD) and by transmit
and receive connection tables (referred to as TCTs and RCTs, respectively). Buffer descriptors are circular
lists of pointers into transmit and receive buffer space in external memory. The following sections describe
the organization and configuration of the buffer descriptors, TCTs, and RCTs.
31.8.1 AAL1 CES Parameter RAM
The PowerQUICC II parameter RAM is used to configure the three FCCs. The CP also uses the parameter
RAM to store operational and temporary values. When configured for ATM mode, PowerQUICC II
overlays the configuration structures shown in the next tables. The following table includes fields for ATM
operation generally and AAL1 CES fields particularly.
Note that some of the values must be initialized by the user; values set by the CP should not be modified
by the user.
Table 31-3. AAL1 CES Field Descriptions
Offset Name Width Description
0x00–
0x3F — — Reserved, should be cleared during initialization.
0x40 RCELL_TMP_BASE Hword Rx cell temporary base address. Points to a total of 64 bytes reserved
dual-port RAM area used by the CP. Should be 64 byte aligned.
User-defined. (recommended address space: 3000h-4000h or
b000h-c000h)
0x42 TCELL_TMP_BASE Hword Tx cell temporary base address. Points to total of 64 bytes reserved
dual-port RAM area used by the CP. Should be 64-byte aligned.
User-defined.
(recommended address space: 3000h-4000h or b000h-c000h)
Pointer mismatch/error
Missing pointer
Hunt mode
Pre-hunt mode
Sync mode
No pointer
Valid pointer
Valid pointer
Pointer mismatch/error
Missing pointer
Valid pointer
new structured