Freescale Semiconductor MPC8260 - Manual (Page 580)

Serial Interface with Time-Slot Assigner
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
15-4 Freescale Semiconductor
• Independent mapping for receive/transmit
• Individual channel echo or loop mode
• Global echo or loop mode through the SI
15.2 Overview
The TSA implements both internal route selection and time-division multiplexing (TDM) for multiplexed
serial channels. The TSA supports the serial bus rate and format for most standard TDM buses, including
T1 and E1 highways, pulse-code modulation (PCM) highway, and the ISDN buses in both basic and
primary rates. The two popular ISDN basic rate buses (interchip digital link (IDL) and general-circuit
interface (GCI), also known as IOM-2) are supported.
Because each SI supports four TDMs, it is possible to simultaneously support a combination of up to eight
T1 or E1 lines, and basic rate or primary rate ISDN channels.
The TDMa channel can support E3 or DS-3 rates as a clear channel in a parallel-nibble interface (FCC in
HDLC mode, clock ratio 1/6) or serial interface (clock ratio 1/4).
TSA programming is independent of the protocol used. The serial controllers can be programmed for any
synchronous protocol without affecting TSA programming. The TSA simply routes programmed portions
of the received data frame from the TDM pins to the target controller, while the target controller handles
the received data in the actual protocol.
In its simplest mode, the TSA identifies the frame using one sync pulse and one clock signal provided
externally by the user. This can be enhanced to allow independent routing of the receive and transmit data
on the TDM. Additionally, the definition of a time-slot need not be limited to 8 bits or even to a single
contiguous position within the frame. Finally, the user can provide separate receive and transmit syncs as
well as clocks.
Figure 15-2 shows example TSA configurations ranging from the simplest to the most
complex.