Freescale Semiconductor MPC8260 - Manual (Page 523)

Memory Controller
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 11-105
Figure 11-85. External Master Access (GPCM)
11.9.5.1 Example of External Master Using the SDRAM Machine
Figure 11-86 shows an interconnection in which a 60x-compatible external master and the
PowerQUICC II can share access to a SDRAM bank. Note that the address multiplexer is controlled by
SDAMUX, while the address latch is controlled by ALE. Also note that because this is a 64-bit port size
SDRAM, BADDR is not needed.
CLKIN
A[0–28]
A[27–31]
TT
TBST
TSIZ
TS
TA
CS
WE
OE
Data
Address
Match and
Compare
Memory
Device
Access